Standard Cell Library Characterization Solution
Adopts intelligent analysis algorithms to analyze and extract arcs and functionalities of the cells
Simulates and builds the timing, power consumption, noise, and other characteristics of standard cells,
Supports planar and FinFET process (advanced nodes down to 7nm)
Provides user-friendly and easy-to-use interfaces to help users shorten product development cycles
2X faster than REF tool
with advanced distributed parallel architecture
Powerful cell circuit analysis algorithm
complete ARC extraction
Built-in NanoSpice &
advanced library characterization models
Supporting advanced FinFET process node
down to 7nm
Simplified user interface and configuration
with built-in benchmark liberty utility
ARM/X86 environment & SGE/LSF cluster
with good scaling
Planar process
library characterization
FinFET process
library characterization
Custom cell
library characterization
Library characterization
on Cloud