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• NanoWave
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• 9812AC
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Fab EDA
SPICE Model
Baseband Modeling / BSIMProPlus
RF Modeling / MeQLab
Model Extraction Automation / SDEP
Model QA / ME-Pro
PDK
PCell Development / PCellLab
PDK Verification / PQLab
Standard Cell
Library Characterization / NanoCell
Library Validation / LibWiz
AMS Design EDA
Design Environment
Schematic Capture / NanoDesigner SE
Layout Editor / NanoDesigner LS
Interactive Physical Verification / NanoDesigner iV
Design Optimization / NanoDesigner Optimizer
Circuit Simulation
SPICE Simulator / NanoSpice
SPICE Simulator / NanoSpice X
SPICE Simulator / NanoSpice Giga
FastSPICE Simulator / NanoSpice Pro
FastSPICE Simulator / NanoSpice Pro X
Mixed Signal / NanoSpice MS
Waveform Analysis / NanoWave
Circuit Analysis
Static and Dynamic Circuit Check / NanoSpice CCK
Yield Analysis / NanoYield
Signal Integrity / NanoSpice SI
Critical Path Analysis / PathInspector
Power Device Design Verification / PTM
ESD Verification / ESDi
Digital Design EDA
Circuit Simulation
Digital Simulation / VeriSim
Standard Cell
Library Characterization / NanoCell
Library Validation / LibWiz
Design & Verification
Timing Analysis / TRASTA
Floor Planning / NavisPro
Signal Integrity Analysis / NanoSpice SI
Power Design Analysis / PTM
ESD Verification / ESDi
Chip-to-Package Connectivity Verification / PadInspector
Testing Systems
Parametric Testing
Semiconductor Parametric Analyzer / FS-Pro
Semiconductor Parametric Analyzer / FS800
Noise Measurement
Low Frequency Noise / 9812DX
Low Frequency Noise / 9812E
Low Frequency Noise / 9813DXC
AC Dynamic Noise / 9812AC
Integrated Testing
Electrical Parameter Testing Software / LabExpress
Design Enablement Services
Wafer Testing
Data Testing / Data Acquisition & Characterization
SPICE Modeling
SPICE Modeling / Model Extraction & QA
Testchip Design
Testkey & Layout / Testkey Design & Layout
New Device
New Device / New Device Solutions
PDK Development
PDK / Development & Verification
IP Development
Standard Cell Library & IP Cores / Characterization & Development
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DTCO
Design Enablement
IC Simulation & Verification
Full Custom Design
Standard Cell Library Design Acceleration
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兴发娱乐