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Circuit Simulation

            

        

    


    

        

            

                

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NanoSpice X

                        
Circuit Type Driven SPICE Simulator

                    

                

                

                                        Analog Fullchip Simulation
                                        Post-layout Simulation
                                        One-stop Flow
                                    

                

                    

                        
As a high-precision and high-capacity parallel SPICE simulator, NanoSpice X is designed to tackle the most challenging simulation tasks. 
  • 2X to 10X+ faster than other solutions with the same precision
  • For accurate block level circuits, complicated analog full chip designs and large post-layout analog circuits with huge parasitic RC on Power and Ground Net
  • Superior parallelization technologies, adaptive SPICE Solver, efficient Matrix solving, post-layout circuit topology optimization and significantly enhanced RC reduction capacities
  • Accommodating up to 100 million circuit elements while preserving SPICE-level accuracy
  • Unique adaptive SPICE engine that automatically matches the most suitable simulation algorithm based on user-specified circuit types
  • Ensuring optimal performance across operating principles, circuit structures, and frequencies
                        Download Brochure
                        
                    

                    

                        
                        

                            

                                                                

                                                            

                            

                            

                        

                        
                        
                    

                

            

        



                

            

                
Highlights

                
    

                                        
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    Faster Speed
    
                        
    Faster simulation runtime in trannoise analysis
    Efficiently handle the time-consuming part
    in analog full chip with digital blocks
    
                    
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    More Comprehensive
    
                        
    Mature digital-centric and
     analog-centric flows
    
                    
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  • 
                        
    Higher Accuracy
    
                        
    True SPICE engine
    following the highest industry standard
    
                    
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  • 
                        
    Larger Capacity
    
                        
    Larger capacity than other SPICE
    especially for post-layout
    
                    
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    Compatibility
    
                        
    Standard input/output formats
    and fully compatible SPICE features
    
                    
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    Expansion
    
                        
    From analog blocks
    to analog full chip
    
                    
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Applications

                
    

                                        
  • Analog full-chip simulation
     (Serdes/PLL/PHY, etc.)
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  • AMS
    mixed-signal
    co-simulation
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  • Customized
    digital circuit
    simulation
    • 
                                        
  • Standard Cell
    characterization
    and verification
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